Dr. Jayanthi
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Dr. Jayanthi

Research Scientist
Annamalai University, India

Highest Degree
Ph.D. in Technology from Anna University, Chennai, Tamil Nadu, India

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Area of Interest:

Computer Sciences
100%
Modeling
62%
Simulation
90%
Data Mining
75%
Image Analysis
55%

Research Publications in Numbers

Books
0
Chapters
0
Articles
0
Abstracts
0

Selected Publications

  1. Saranya, K. and S. Jayanthy, 2018. Machine learning techniques for onto-based emotional classification of text. Int. J. Pure Applied Math., 118: 357-363.
  2. Sruthi, B.M. and S. Jayanthy, 2017. Remote monitoring of agricultural land using wireless sensor nodes. Int. J. Adv. Comput. Elect. Eng., 2: 13-21.
  3. Sruthi, B.M. and S. Jayanthy, 2017. Development of cloud based incubator monitoring system using raspberry Pi. Int. J. Edu. Manage. Eng., 7: 35-44.
  4. Hadria, F.M. and S. Jayanthy, 2017. ARM based security system using linear discriminant analysis. ICTACT J. Microelect., 3: 417-424.
  5. Suganya, M., S. Jayanthy and N.G. Shirley, 2016. An intelligent navigator for indoor applications using raspberry Pi. Middle-East J. Scient. Res., 24: 124-130.
  6. Jennifer, J.L., S. Jayanthy and J. Sujitha, 2016. Li-Fi technology based fleet vanguardand security. Indian J. Sci. Technol., Vol. 9. 10.17485/ijst/2016/v9i11/85090.
    CrossRef  |  Direct Link  |  
  7. Jennifer, J.L. and S. Jayanthy, 2016. A smart wearable sensor device for infants with ASD. Middle-East J. Scient. Res., 24: 263-267.
  8. Shirley, N.G. and S. Jayanthy, 2015. Virtual control hand gesture recognisation system using raspberry Pi. ARPN J. Eng. Applied Sci., 10: 2989-2993.
  9. Naveenkrishna, M. and S. Jayanthy, 2015. Real time vehicle tracking and monitoring using raspberry Pi. Int. J. Applied Eng. Res., 10: 15259-15263.
  10. Naghalakshimi, R. and S. Jayanthy, 2015. Fault monitoring, diagnosis and automatic control in wind turbine using CAN network. Int. J. Applied Eng. Res., 10: 409-414.
  11. Jennifer, D.R. and S. Jayanthy, 2015. A cordic based low power DCT architecture for image data compression applications. Int. J. Applied Eng. Res., 10: 16726-16731.
  12. Jayanthy, S. and M.C. Bhuvaneswari, 2015. Fuzzy delay model based fault simulator for crosstalk delay fault test generation in Asynchronous sequential circuits. Sadhana Indian Acad. Sci., 40: 107-119.
  13. Karthika, N. and S. Jayanthy, 2014. Design of hybrid pulsed flip flop featuring embedded logic. IOSR J. VLSI Signal Process., 4: 68-74.
  14. Jayanthy, S., M.C. Bhuvaneswari and M. Prabhu, 2013. Simulation-based ATPG for low power testing of crosstalk delay faults in asynchronous circuits. Int. J. Comput. Applic. Technol., 48: 241-252.
    Direct Link  |  
  15. Jayanthy, S., M.C. Bhuvaneswari and K.Sujitha, 2012. Test generation for crosstalk-induced delay faults in VLSI circuits using modified FAN algorithm. VLSI Design, Vol. 2012. 10.1155/2012/745861.
    CrossRef  |  Direct Link  |  
  16. Soundararajan, J. and B.M. Chinnadurai, 2011. Simulation based low powertest generation for crosstalk delay faults. Int. J. Model. Simul., 31: 234-242.
    CrossRef  |  Direct Link  |  
  17. Jayanthy, S. and M.C. Bhuvaneswari, 2011. An efficient multi-objective genetic algorithm for low power testing of crosstalk delay faults in VLSI circuits. Assoc. Model. Simul. Enterprises, 54: 28-48.