Dr. Yasir Amer Abbas Al-Zubaidi
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Dr. Yasir Amer Abbas Al-Zubaidi

Assistant Professor
Department of Computer Engineering, University of Diyala, Baqubah, Diyala, Iraq


Highest Degree
Ph.D. in Computer Engineering from Universiti Tenaga Nasional, Malaysia

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Biography

Associate Professor. Dr.Yasir Amer Abbas was awarded the Bachelor of Science (First Class Hons.) Degree and Master of Science Degree in Computer Engineering from the University of Technology, Iraq, in the year 2000 and 2005, respectively. Ph.D. In Computer Engineering at 2016 from Universiti Tenaga National, Malaysia. He is a member of the IEEE and the IEEE Computer Society since 2012. He has also

Area of Interest:

Computer Engineering
100%
Digital Signal Processing
62%
Image Processing
90%
Cryptography
75%
Wireless Communications
55%

Research Publications in Numbers

Books
0
Chapters
0
Articles
14
Abstracts
7

Selected Publications

  1. Hatif, Y.N., Y.A. Abbas and M.H. Ali, 2022. Lightweight ANU-II block cipher on field programmable gate array. Int. J. Electr. Comput. Eng., 12: 2194-2205.
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  2. Jameil, A.K., Y.A. Abbas and S.Al-Azawi, 2021. Low power and high speed sequential circuits test architecture. Recent Adv. Comp. Sci. Commun., 14: 1669-1679.
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  3. Abbas, Y.A. and Alharith A. Abdullah, 2021. Efficient hardware implementation for quantum key distribution protocol using FPGA. IOP Conf. Ser.: Mater. Sci. Eng., Vol. 1076. 10.1088/1757-899X/1076/1/012043.
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  4. Abbas, Y.A., S. Albawi, A. T. Abd and A.K. Jameil, 2020. A systematic mapping study on radio frequency identification security. Int. J. Sens. Wireless Commun. Control, 10: 659-668.
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  5. Abbas, Y.A., R. Jidin, N. Jamil and M.R. Z’aba, 2018. Reusable data-path architectures for EtM and MtE on FPGA. Adv. Sci. Lett., 24: 757-761.
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  6. Abbas, Y.A., R. Jidin, N. Jamil and M.R. Zaba, 2016. Reusable data-path architecture for encryption-then-authentication on FPGA. Int. Revi. Comp. Software, Vol. 11. 10.15866/irecos.v11i1.8367.
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  7. Abbas, Y.A., R. Jidin, N. Jamil, M.R. Zaba and M.E. Rusli, 2015. PRINCE IP-core on field programmable gate arrays (FPGA). Res. J. Appl. Sci., Eng. Technol., 10: 914-922.
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  8. Abbas, Y.A., R. Jidin, N. Jamil, M.R. Z'aba, M.E. Rusli and B. Tariq, 2014. Implementation of PRINCE algorithm in FPGA. Proceedings of the 6th International Conference on Information Technology and Multimedia, November 18-20, 2014, Putrajaya, pp: 1-4.
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