Dr. S. Nagakishore Bhavanam

Assistant Directir, IQAC
Acharya Nagarjuna University, India

Highest Degree
Ph.D. in Signal Processing and Communications from Jawaharlal Nehru Technological University, Anantapur, India

My URL
https://livedna.org/91.11365

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Biography

Mr. S Nagakishore Bhavanam is currently working as Assistant Professor at Acharya Nagarjuna University, Sreyas Institute of Technology, Guru Nanak Institute of Technology, Auroras Technological & Research Institute. He is PhD student in Signal Processing & Communications (ECE) at Jawaharlal Nehru Technological University, Anantapur, India. Mr. Bhavanam received honor includes College Topper in M.Tech, Aurora’s Technological and Research Institute, Hyderabad, Got a Gold Shield for Technical Paper Presentation in ZIKSANA 2010 Conducted by Vignan Institute of Technology & Aeronautical Engineering, Hyderabad and College Topper in B.Tech, S.V.V.S.N Engineering College, Ongole. He also worked as worked as an Assistant Project Investigator for the Prestigious Project Choke Ring Antenna Design Sponsored by Indian Space Research Organization (ISRO), Bangalore. He is member of IEEE, and IETI. He has published 42 research articles in international journals as well as 27 papers in national and international conferences contributed as author/co-author. He is also acting as reviewer for International Journal of Ethics in Engineering & Management Education, International Journal of Engineering Research, International Journal of Scientific Engineering and Technology, The 11th IEEE India Conference INDICON 2014 Emerging Trends and Innovative in Technology, IEEE International Conference on Signal Processing, Informatics, Communication and Energy Systems, World Scientific and Engineering Academy and Society, International Conference on Computing in Mechanical Engineering, and World Scientific and Engineering Academy and Society.

Area of Interest:

Computer Sciences
VLSI Design
Wireless Communication
Wave Propagation
Computer Networks

Selected Publications

  1. Sumanth, K., S.N. Bhavanam and B.B. Rao, 2016. Performance analysis of non-uniform filter bank with Equi ripple band pass filter. Int. J. Eng. Comput. Sci., 5: 17511-17516.

  2. Sumanth, K., S.N. Bhavanam and B.B. Rao, 2016. Design of non-uniform cosine modulated filter banks using windows. Int. J. Eng. Res. Applic., 6: 32-38.

  3. Saihood, M.A., K.L. Bhavani and S.N. Bhavanam, 2016. Monitoring power quality system based on wireless sensor network using VB6. Int. J. Scient. Eng. Res., 7: 377-382.

  4. Midasala, V., S.N. Bhavanam and K.L. Bhavani, 2016. Design of 20x20 elements phased array antenna using MATLAB. Int. J. Res. Applied Sci. Eng. Technol., 4: 253-257.

  5. Bhavanam, S.N., P. Siddaiah and P.R. Reddy, 2016. Area and power optimized DTMF detection by using different FPGA's. Proc. Comput. Sci., 85: 331-344.
    CrossRef  |  Direct Link  |  

  6. Bhavanam, S.N. and R.S. Kalyan, 2016. Design of a novel coaxial feed triple frequency patch antenna with slots and shorting pin. Proc. Comput. Sci., 85: 345-351.
    CrossRef  |  Direct Link  |  

  7. Ahmed, M., S.N. Bhavanam and K.L. Bhavani, 2016. MANET: Energy-spectrum efficiency trade-off. Int. J. Eng. Sci. Comput., 6: 5295-5299.
    Direct Link  |  

  8. Jalil, Q., M. Ali and S.N. Bhavanam, 2015. GUI of control system on the level of oil tank by two pumps using V. basic. Int. J. Scient. Technol. Res., 4: 349-353.
    Direct Link  |  

  9. Bhavanam, S.N., P. Siddaiah and P.R. Reddy, 2015. Zynq 7000 series FPGA based efficient DTMF detection. Indian J. Tech. Educ., 38: 65-76.

  10. Bhavanam, S.N., M. Vasujadevi, B.B. Rao and V.K. Naik, 2015. Design of a practical type transmission lines by using COMSOL multyphysics 5.1. Int. J. Emerg. Technol. Comput. Applied Sci., 1: 65-69.

  11. Bhavanam, S.N., 2015. Design and simulation of single frequency rectangular patch antenna by using HFSS. Int. J. Eng. Res. Applic., 5: 6-9.

  12. Bhavanam, S.N. and Q. Jalil, 2015. Performance analysis of OFDM system using fourier transform and zero-forcing channel estimation on different modulation. Int. J. Adv. Res. Comput. Commun. Eng., 4: 332-335.
    Direct Link  |  

  13. Bhavanam, S.N. and Q. Jalil, 2015. Performance analysis for OFDM system using fourier transform and wavelet transform with different modulation techniques. Int. J. Scient. Eng. Res., 6: 575-580.
    Direct Link  |  

  14. Bhavanam, S.N. and Q. Jalil, 2015. OFDM channel analysis between FFT and wavelet transform techniques. Int. J. Emerg. Technol. Comput. Applied Sci., 11: 75-79.
    Direct Link  |  

  15. Bhavanam, S.N. and B.L. Narayana, 2015. Design and simulation of tripple frequency triangular patch antenna by using HFSS 14.0. Int. J. Applied Eng. Res., 10: 18585-18588.

  16. Ali, M., Q. Jalil and S.N. Bhavanam, 2015. Verification of GPS data using REB-4216 card during satellite communication system. Int. J. Applied Eng. Res., 10: 38397-38402.

  17. Vasujadevi, M. and S.N. Bhavanam, 2014. Fault diagnosis in memory chips using FPGA-by complex text pattern generation. Int. J. Eng. Res. Sports Sci., 1: 13-18.

  18. Vasujadevi, M. and S.N. Bhavanam, 2014. Design of vivaldi antenna -by using COMSOL multiphysics software. Acharya Nagarjuna Univ. J. Eng. Technol., 6: 1-7.

  19. Mandava, S., S.N. Bhavanam and M. Vasujadevi, 2014. Design and analysis of parallel interference canceller rake system for WCDMA networks. Acharya Nagarjuna Univ. J. Eng. Technol., 6: 8-11.

  20. Bhavanam, S.N., P. Siddaiah and P.R. Reddy, 2014. Spartan 3E FPGA based efficient DTMF detection by using RSA. Acharya Nagarjuna Univ. J. Eng. Technol., 6: 12-18.

  21. Bhavanam, S.N., P. Siddaiah and P.R. Reddy, 2014. Goertzel algorithm based DTMF detection. Am. Int. J. Res. Sci. Technol. Eng. Math., 1: 6-12.
    Direct Link  |  

  22. Bhavanam, S.N., P. Siddaiah and P.R. Reddy, 2014. FFT based DTMF detection by using spartan 3E FPGA. Am. Int. J. Res. Formal Applied Natural Sci., 7: 1-6.
    Direct Link  |  

  23. Bhavanam, S.N., 2014. Multi scale decomposition and edge preserving filter based satellite image resolution enhancement-A review. Int. J. Innov. Res. Electric. Electron. Instrument. Control Eng., 2: 1696-1699.
    Direct Link  |  

  24. Bhavanam, S.N. and M. Vasujadevi, 2014. Printed microstrip compact antenna with slots in ground plane and patch using HFSS. Int. J. Eng. Res. Sports Sci., 1: 19-24.

  25. Bhavanam, S.N. and M. Syed, 2014. A novel algorithm for satellite image resolution enhancement using wavelet-domain approach based on (DT-CWT) and Non Local Means (NLM). Int. J. Eng. Tech. Res., 2: 312-315.

  26. Vasujadevi, M., S.N.K. Bhavanam and G.P. Ratna, 2013. Wireless fidelity medium access control transmitter design using Xilinx ISE. Res. J. Eng. Technol., 6: 13-21.

  27. Bhavanam, S.N., 2013. Goertzel algorithm based DTMF detection using FPGA. Acharya Nagarjuna Univ. J. Eng. Technol., 1: 29-35.

  28. Rudrakshi, S., V. Midasala and S.N. Bhavanam, 2012. Implementation of FPGA based fault injection Tool (FITO) for testing fault tolerant designs. IACSIT Int. J. Eng. Technol., 4: 522-526.

  29. Keerthi, M., V. Midasala, S.N. Bhavanam and K.J. Reddy, 2012. FPGA implementation of distributed arithmetic for FIR FILTER. Int. J. Eng. Res. Technol., 1: 1-8.

  30. Bhavanam, S.N., 2012. Design and implementation of FPGA based low power digital FIR filter. IOSR J. Electron. Commun. Eng., 4: 11-19.

  31. Bhavanam, S.N. and M. Vasujadevi, 2012. Design of low power multiplier with reduced spurious transition activity technique (RSTAT) for wireless sensor network. Int. J. Comput. Commun. Syst., 1: 6-12.

  32. Bhavanam, S.N. and M. Vasujadevi, 2012. Design and development of device drivers and haradware for 8051 development board. Acharya Nagarjuna Univ. J. Eng. Technol., 4: 85-97.

  33. Vasujadevi, M, and S.N. Bhavanam, 2011. FPGA implementation of large area efficient and low power geortzel algorithm for spectrum analyzer. Int. J. Recent Trends Eng. Technol., 5: 53-57.

  34. Shoban, M. and S.N. Bhavanam, 2011. Design and implementation of viterbi decoder using FPGAs. Int. J. Mod. Eng. Res., 1: 7-14.

  35. Racherla, R. and S.N. Bhavanam, 2011. Design and simulation of enhancing RC4 stream cipher for wi-fi security using verilog HDL. Int. J. Eng. Res. Applic., 1: 653-659.

  36. Madasi, H., S.N. Bhavanam and V. Midasala, 2011. A PIC compatible RISC CPU core implementation for FPGA based configurable SOC platform for embedded applications. Int. J. Electric. Power Eng., 5: 11-15.

  37. Bhavanam, S.N., M. Vaujadevi, N.M. Reddy and S.P.K. Reddy, 2011. Video improvement technique for vibrating video signals in surveillance applications. Int. J. Recent Trends Eng. Technol., 5: 116-121.

  38. Bhavanam, S.N., M. Vasujadevi and M.M. Gopal, 2010. Implementation of FPGA based LOW-COST Logic Signal Analyzer (LSA). Int. J. Recent Trends Eng. Technol., 4: 170-174.
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Member since March, 2016