# Dr. C. Bharatiraja

Assistant ProfessorSRM University, India

**Highest Degree**

Ph.D. in Electrical Engineering from SRM University, India

**Share this Profile**

SRM University, India

**Highest Degree**

Ph.D. in Electrical Engineering from SRM University, India

**Share this Profile**

100%

Electronics Applications

62%

Electrical Engineering

90%

Power Components

75%

Control Theory

55%

- Suresh, S., R. Gnanadass, N.P. Subramaniam and C.Bharatiraja, 2017. Electric power quality recognition for distribution feeders: A real time study. J. Elect. Eng. (In Press). .
- Santhakumar, C., R. Shivakumar, C. Bharatiraja and P. Sanjeevikumar, 2017. Circulating current in diode clamped MLI fed induction motor drive. Int. J. Power Elect. Drive Sys. (In Press). .
- Chokkalingam, B., S. Padmanaban, P. Siano, R. Krishnamoorthy and R. Selvaraj, 2017. Real-time forecasting of EV charging station scheduling for smart energy systems. Energies, Vol. 10. 10.3390/en10030377.

CrossRef | Direct Link | - Bindu, A., M.C. Mabel and C. Bharatiraja, 2017. A real-time energy management approach and its power converter for PV powered plug-in electric vehicle. J. Elect. Eng. (In Press). .
- Bharatiraja, C., S. Raghu, J.L. Munda and P. Sanjeevikumar, 2017. Analysis, design and investigation on a new single-phase switched quasi Z-source inverter for photovoltaic application. Int. J. Power Electr. Drive Syst. (In Press). .
- Bharatiraja, C., S. Jeevananthan and J.L. Munda, 2017. Timing correction algorithm for SVPWM based diode- clamped MLI operated in overmodulation region. IEEE Power Electron. Applic. (In Press). .
- Bharatiraja, C., P. Sanjeevikumar and F. Blaabjerg, 2017. Critical investigation and comparative analysis of advanced PWM techniques for three-phase three-level NPC-MLI drives. Elect. Power Compon. Syst. (In Press). .
- Bharatiraja, C., H. Shri, J.L Munda, P. Sanjeevikumar, M. Sriram Kumar, and B. Vivek, 2017. A PWM Strategies for Diode Assisted NPC-MLI to Obtain Maximum Voltage Gain for EV Application Int. J., Power Electr. Drive Sys., .
- Bharatiraja, C., B. Shyam, V. Krishnakumar, P. Sanjeevikumar and G. Nixon, 2017. Investigation of slim type BLDC motor drive with torque ripple minimization using abridged space - vector PWM control method. Int. J. Power Electr. Drive Syst. (In Press). .
- Thavaselvi, P., C. Vimala, C. Bharathiraja, C. Bharatiraja and P. Aruna Priya
*et al*., 2016. Signal, digital and image processing application in different fields. Int. J. Control Theory Appl. 9: 6653-6657. - Sathayanarayanan, T.K.S., M. Ramasamy, C. Bharatiraja and J.L. Munda, 2016. Modelling, impedance design and efficiency analysis of battery assists PV tied Quasi-Z source inverter. Int. J. Power Elect. Drive Syst., 3: 816-825.

Direct Link | - Prakash, C., G. Subramani, C. Bharatiraja and M. Shabin, 2016. A low cost single phase grid connected reduced switch PV inverter based on time frame switching scheme. Int. J. Elect. Power Energy Syst., 77: 100-111.

CrossRef | Direct Link | - Bharatiraja, C., and H. Chowdary, 2016. Real time power quality phenomenon for various distribution feeders. Indonesian J. Elect. Eng., 3: 10-16.

Direct Link | - Bharatiraja, C., S. Raghu and A. Prabathkumar, 2016. Analysis and simulation of magnetically coupled Y shape impedance source inverter Indian J. Sci. Technol., 9: 1-7.
- Bharatiraja, C., J.L. Munda, N. Sriramsai and T.S. Navaneesh, 2016. Investigation of the common mode voltage for a neutral-point-clamped multilevel inverter drive and its innovative elimination through SVPWM switching-state redundancy. Int. J. Power Electr. Drive Syst., 3: 892-900.

Direct Link | - Bharatiraja, C., H. Reddy, S.N. Ramsai and S.S. Saisuma, 2016. FPGA based design and validation of asymmetrical reduced switch multilevel inverter, Int. J. Power Electr. Drive Sys., 7: 340-348.
- Bharatiraja, C., S. Jeevananthan, J.L. Munda and R. Latha, 2016. Improved SVPWM vector selection approaches in OVM region to reduce common-mode voltage for three-level neutral point clamped inverter, Int. J. Electr. Power, Energy, Sys. Elsevier, 79: 285-297.
- Bharatiraja, C. and N. Sriramsai, 2016. Investigation of the common mode voltage for a neutral-point-clamped multilevel inverter drive and its innovative elimination through SVPWM switching-state redundancy. Int. J. Power Elect. Drive Syst., 3: 816-825.
- Bharatiraja, C., S. Jeevananthan, S. R.Latha and V.Mohan, 2016. Vector selection approach-based hexagonal hysteresis space vector current controller for a three phase diode clamped MLI with capacitor voltage balancing, IET Power Electron., 9: 1350-1361.
- Bharatiraja, C., S. Jeevananthan and R. Latha, 2015. A new asymmetrical single phase 15 level reduced switch multilevel voltage source inverter. J. Elect. Eng., 15: 1-9.
- Bharatiraja, C. and R. Latha, 2015. A 3-dimensional SVPWM algorithm, its FPGA-implementation for multilevel minverters, J. Elect. Eng., 15: 61-71.
- Bharatiraja, C., S.Jeevananthan and R. Latha, 2014. FPGA based practical implementation of NPC-MLI with SVPWM for an autonomous operation PV system with capacitor balancing, Int. J. Elect. Power, Energy Sys. Elsevier, 61: 489-509.
- Bharatiraja, C., and M. Shabin, 2013. A Novel reduced switch single source MLI topology with variable input overvoltage control, Procedia Eng. / Elsevier, 64: 205-214.
- Bharatiraja, C., R.Palanisamy, K.V.R.S. PrakasaRao, R. latha and S.S. Dash, 2013. Embraced algorithm design and its FPGA IP-core implementation of an 3D -SVPWM for MLIs operating over a wide modulation range. Int. Rev. Elect. Eng., 4: 39-43.
- Bharatiraja, C., R. Palanisamy, S. Sadagopan, R. Latha and S.S. Dash, 2013. Modelling and simulation of 3-phase transformerless split inductor multilevel inverter for grid connected photovoltaic system. Adv. Mater. Res., 768: 75-79.

Direct Link | - Bharatiraja, C., R. Palanisamy and S.S. Dash, 2013. Hysteresis current controller based transformerless split inductor-NPC-MLI for grid connected PV-system. Procedia Eng., 64: 224-233.

CrossRef | Direct Link | - Bharatiraja, C., R. Latha, S.S. Dash, R.R. Gulati and P.V. Sharma, 2013. A 3D-SVPWM algorithm design and its FPGA IP-core implementation for MLIS operating over a wide modulation range. Int. Review Electr. Eng., 8: 947-961.
- Bharatiraja, C., R. Latha, S. Jeevananthan, S. Raghu and S.S. Dash, 2013. Design And Validation Of Simple Space Vector PWM Scheme For Three-Level NPC– MLI With Investigation Of DC Link Imbalance Using FPGA - IP Core, J. Elect. Eng., 13: 54-63.
- Bharatiraja, C., S.Jeevananthan, S.Raghu, V.Arvind and A.Sameer, 2013. Common mode voltage reductions for three phase coupled inductor inverter using multi-carrier interleaved PWM strategies. Int. Review Modell. Simul., 6: 1416-1425.
- Bharatiraja, C., S. Raghu and K.R.S. Rao, 2013. Comparative analysis of different PWM techniques to reduce the common mode voltage in three-level neutral-point- clamped inverters for variable speed induction drives, Int. J. Power Elect. Drive Sys. 3: 105-116.
- Bharatiraja, C., S. Jeevananthan and S.S. Dash, 2013. A vector selection approach based on control degree of freedom to provide dc-link voltage balancing in diode clamped multilevel inverter. Int. Review Electr.ical Eng., 8: 39-51.
- Bharatiraja, C., S. Jeevananthan, R. Latham and S.S.Dash, 2012. A space vector pulse width modulation approach for DC link voltage balancing in diode-clamped multilevel inverter. AASRI Procedia, 3: 133-140.
- Rahmani, L., N. Belhaouchet and S. Begag, 2009. A novel adaptive hysteresis current controller for three phase shunt active power filter with constant switching frequency. Int. J. Electrical Power Eng., 2: 127-133.

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